A combinational logic circuit is one whose output at any given time depends only on the combination of its inputs at that same time. It has no memory elements, so its output is not a function of previous inputs.
This is the reverse of the design procedure. You are given a circuit diagram and need to determine its function.
A circuit that adds two single bits. It has two inputs (A, B) and two outputs (Sum, Carry).
A circuit that adds three single bits (A, B, and a Carry-in Cin). It can be constructed from two half adders.
Similar to adders, these circuits perform subtraction on binary bits, producing a Difference and a Borrow output.
Combinational circuits can be designed to convert from one binary code to another, for example, from Binary Coded Decimal (BCD) to Excess-3 code. The design procedure is followed: define inputs/outputs, create a truth table for the conversion, use K-maps to simplify the expression for each output bit, and draw the circuit.
Any Boolean expression can be implemented using only NAND gates. An AND-OR circuit can be easily converted to a NAND-NAND circuit. This is often advantageous as NAND gates are typically faster and cheaper to fabricate.
The XOR function is an important Boolean function used extensively in parity checkers and arithmetic circuits. Its output is true only when the inputs are different. The XNOR (Equivalence) function is its complement, producing a true output when the inputs are the same.
To add binary numbers with more than one bit, we can cascade Full Adders. A 4-bit parallel adder is constructed using 4 Full Adders, where the carry-out of one stage is connected to the carry-in of the next stage.
A BCD adder adds two BCD digits (4 bits each) and produces a BCD sum. The logic is more complex than a binary adder because if the 4-bit binary sum is greater than 9, a correction is needed (by adding 6, which is 0110 in binary) to get the correct BCD result and generate a carry.
A circuit that compares two binary numbers (A and B) and determines their relative magnitude. The output consists of three signals indicating whether A > B, A = B, or A < B.
A decoder is a circuit that converts binary information from 'n' input lines to a maximum of 2n unique output lines. For example, a 3-to-8 decoder takes a 3-bit input and activates one of the 8 outputs.
A multiplexer (or data selector) is a circuit that selects one of several input signals and forwards it to a single output line. The selection is controlled by a set of select lines. A 2n-to-1 MUX has 2n data inputs, 'n' select lines, and 1 output.
A ROM is a memory device that stores binary information permanently. In the context of combinational logic, a ROM can be seen as a device that implements a set of Boolean functions. A ROM consists of a decoder and a set of OR gates. The decoder generates all the minterms, and the OR gates sum them to create the desired output functions.
A PLA is a flexible programmable logic device with both a programmable AND array and a programmable OR array. This allows the user to implement a specific set of SOP functions. It is more flexible than a ROM because it does not necessarily generate all the minterms, only the required product terms.