Unit 4: Sequential Logic Circuits

4.1 Introduction to Sequential Logic

A sequential circuit is a logic circuit whose output depends on the present value of its input signals and the sequence of past inputs (the state). This is in contrast to combinational logic, whose output is a function of only the present input. This is possible because sequential circuits have memory elements.

There are two types of sequential circuits:

• Synchronous: The state of the device changes only at discrete times in response to a clock signal.
• Asynchronous: The state of the device can change at any time in response to changing inputs.

4.2 Flip-Flops

A flip-flop is a fundamental memory element in sequential logic. It can store one bit of information (0 or 1). It is a bistable multivibrator, meaning it has two stable states.

SR Flip-Flop

The Set-Reset (SR) flip-flop has two inputs, S and R. S sets the output to 1, and R resets it to 0. A major drawback is the invalid state when both S and R are 1.

D Flip-Flop

The Data (D) flip-flop has a single data input D. The output Q simply follows the input D at the clock edge. It prevents the invalid state of the SR flip-flop.

JK Flip-Flop

The JK flip-flop is an improvement on the SR flip-flop. It has J and K inputs. When J=1 and K=1, the output toggles (flips to its opposite state) on the clock edge, resolving the invalid state issue.

T Flip-Flop

The Toggle (T) flip-flop has a single input T. If T=1, the output toggles on the clock edge. If T=0, the output holds its state. It can be made from a JK flip-flop by tying J and K inputs together.

4.3 Analysis of Clocked Sequential Circuits

The analysis of a sequential circuit involves determining its behavior from its logic diagram. This is done by deriving its state table and state diagram.

1. State Equations: Write the Boolean expressions for the flip-flop inputs and the circuit outputs.
2. State Table: Create a table showing the relationship between the present state, inputs, next state, and outputs. The next state is determined from the state equations and the flip-flop's characteristic equation.
3. State Diagram: Create a graphical representation of the state table. Circles represent states, and directed lines represent transitions between states, labeled with "input/output".

4.4 State Reduction and Assignment

State Reduction

The goal is to reduce the number of states in a state table, which can lead to a simpler circuit with fewer flip-flops. Two states are considered equivalent if, for every possible input, they produce the same output and transition to the same or equivalent next states. This is a complex process often done using a partitioning method.

State Assignment

Once the state table is reduced, we must assign a unique binary code to each state. The number of bits required is `ceil(log₂(n))`, where `n` is the number of states. The choice of assignment can significantly affect the complexity of the resulting circuit. There are various assignment rules (e.g., assigning adjacent codes to adjacent states in the state diagram) to simplify the logic.

4.5 Flip-Flop Excitation Tables

An excitation table is crucial for the design of sequential circuits. It shows the necessary flip-flop input(s) required to transition from a present state (Q) to a desired next state (Q(t+1)).

Present State Q(t)	Next State Q(t+1)	J	K	S	R	D	T
0	0	0	X	0	X	0	0
0	1	1	X	1	0	1	1
1	0	X	1	0	1	0	1
1	1	X	0	X	0	1	0

('X' represents a don't care condition).

4.6 Design Procedure for Sequential Circuits

This is a systematic approach to creating a sequential circuit from a specification.

1. State Diagram/Table: From the problem description, create a state diagram or state table that describes the desired behavior.
2. State Reduction: If possible, reduce the number of states.
3. State Assignment: Assign binary codes to the states.
4. Choose Flip-Flop Type: Select the type of flip-flop to use (e.g., JK, D).
5. Derive Flip-Flop Inputs and Outputs: Use the state table and the chosen flip-flop's excitation table to create a new table that includes the required flip-flop inputs for each transition.
6. Simplify Expressions: Use K-maps to find simplified Boolean expressions for each flip-flop input and each circuit output.
7. Draw Logic Diagram: Implement the circuit based on the simplified expressions.

Design of Counters

A counter is a register that goes through a predetermined sequence of states. The design follows the general procedure. For example, to design a 3-bit synchronous up-counter, the states would be 000, 001, 010, ..., 111, and back to 000. We would use this sequence to create the state table and derive the logic for the flip-flop inputs.